UNIVERSITY CATALOG: 2017-2018

Course: ECE 526/L. Digital Design with Verilog and System Verilog and Lab (3/1)

Prerequisites: ECE 320/L. Corequisite: ECE 526L. This course covers the use of Verilog and SystemVerilog Languages (IEEE Std. 1800) for the design and development of digital integrated circuits, including mask-programmed integrated circuits (ASICs) and field programmable devices (FPGAs). Hierarchical top down vs. bottom up design, synthesizable vs. non-synthesizable code, design scalability and reuse, verification, hardware modeling, simulation system tasks, compiler directives and subroutines are all covered and illustrated with design examples. 3 hours lecture, one 3-hour lab per week.

Spring-2018 - Schedule of Classes

ECE 526

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Spring-2018 - Schedule of Classes

ECE 526L

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Fall-2017 - Schedule of Classes

ECE 526

Class NumberLocationDayTime

Fall-2017 - Schedule of Classes

ECE 526L

Class NumberLocationDayTime