Course: ECE 623. Diagnosis and Reliable Design of Digital Systems (3)
Prerequisite: ECE 620 or instructor consent. Basic theory and techniques for testing VLSI circuits and systems. Fault modeling, logic simulation and fault simulation techniques are discussed. Test generation for combinational and sequential logic circuits, as well as checking experiments. Gate-level digital simulation and its application to fault diagnosis. Design techniques using static and dynamic redundancy for reliable systems, design for testability (DFT), built-in self-test (BIST) and design techniques for fault tolerant and early diagnosable systems. The use of DFT tools for test generation, fault diagnosis, fault coverage, design for testability, reliability computations and test synthesis. Delay faults and testing, fault diagnosis, quiescent current testing (Iddq), functional testing and crosstalk.